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Cypress Publishes Industry's First Reference Book on Managing "Soft Error Rate" in SRAM Design
Guide Helps Customers Measure and Minimize the Impact
of Soft Errors in Memory Chip Design and Production
SAN JOSE, Calif.—(BUSINESS WIRE)—Aug. 19, 2004—
Cypress Semiconductor Corp. (NYSE:CY), a world leader in SRAMs,
today announced the publication of "SER -- History, Trends, and
Challenges: A Guide for Designing with Memory ICs." This helpful text
provides design engineers with expert information on SER (Soft Error
Rate), ranging from its causes to its impact on larger electronic
systems. It includes an historical perspective on the causes and
effects of soft errors and offers methods for measuring SER on various
chips. The book also describes process techniques that improve SER
immunity, including substrate optimization and techniques to increase
node capacitance.
Soft errors are caused by alpha particles, terrestrial cosmic rays
and thermal neutrons that spontaneously flip bits of stored data in a
memory or logic chip, resulting in system crashes and network failure.
At various altitudes and rates, cosmic rays can corrupt data within a
chip, leading to overall electronic malfunctions. Awareness of soft
errors can play a substantial role in memory chip invention and
production.
The SER problem first gained widespread attention as a memory data
issue in the late 1970s, when DRAMs began to show signs of random
failures. As process technologies have continued to shrink, the
critical charge required to cause a soft error has stayed relatively
constant while the charge collection area in memory cells has
decreased much faster. As a result, more mitigation techniques are
required to ensure acceptable soft error rate levels, particularly in
large systems, where the use of memory devices is steadily increasing.
The first to market with 90nm-scale devices, Cypress has taken the
lead in collecting and testing data about this random phenomenon,
locating the sources of SER and creating effective solutions to
diminish the wide-ranging problem. Solutions proposed in the book
include manufacturing process changes, circuit hardening, design
redundancies and system-level modifications.
About the Authors
James F. Ziegler holds bachelors, masters and Ph.D. degrees in
physics from Yale University. Mr. Ziegler worked at IBM for more than
30 years before joining the U.S. Naval Academy in Annapolis, MD, where
he currently teaches science to electrical engineers. His 1979 paper
suggesting that cosmic rays were a substantial contributor to
electronic reliability has become the benchmark in the analysis of
system reliability of terrestrial electronics. Dr. Ziegler is a fellow
of the IEEE and the American Physical Society. He is the author or
editor of 18 scientific books and a myriad of technical articles. He
holds 16 U.S. patents.
Helmut Puchner earned his Ph.D. degree in Electrical Engineering
from the Technical University of Vienna, Austria. He joined Cypress in
2002 where he now leads a team responsible for transistor development,
device reliability, simulation, and compact modeling. His research on
SER over the past seven years has resulted in promising soft error
mitigation techniques for CMOS technologies. Dr. Puchner is a senior
member of the IEEE and has published more than 40 papers and holds 17
U.S. patents.
Distribution and Availability
"SER -- History, Trends, and Challenges: A Guide for Designing
with Memory ICs" is available today and priced starting at $25 per
book. To purchase your copy, visit www.cypress.com/support and click
on "Online Store." Other books published by Cypress include "Perfect
Timing: A Design Guide for Clock Generation and Distribution" and "The
VHDL Programmable Logic Textbook."
Photo
A photo of the book can be downloaded from
http://www.cypress.com/support/link.cfm?mr=ser.
About Cypress
Cypress Semiconductor Corp. (NYSE:CY) is Connecting from Last Mile
to First Mile(TM) with high-performance solutions for personal,
network access, enterprise, metro switch and core
communications-system applications. Cypress Connects(TM) using
wireless, wireline, digital, and optical transmission standards,
including USB, Fibre Channel, SONET/SDH, Gigabit Ethernet and DWDM.
Leveraging its process and system-level expertise, Cypress makes
industry-leading physical layer devices, framers and network search
engines, along with a broad portfolio of high-bandwidth memories,
timing technology solutions and reconfigurable mixed-signal arrays.
More information about Cypress is accessible online at
http://www.cypress.com.
Cypress and the Cypress logo are registered trademarks of Cypress
Semiconductor Corp. "Connecting From Last Mile to First Mile "and
"Cypress Connects" are trademarks of Cypress. All other trademarks are
the property of their respective owners.
Contact:
Cypress Semiconductor Corp.
Kathy Hernandez, 408-544-1031
KZH@cypress.com
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